Image sensors using pinned photodiode pixels, typically implemented in CMOS architecture, are well known. Such image sensors in many applications have the advantage that both the image sensitive element and the image processing circuitry can be embodied in a single chip which can be manufactured using CMOS techniques.
A continuous time analog to digital converter architecture has been previously disclosed, for example, in European Patent 1956715, the disclosure of which is hereby incorporated by reference. However, such an architecture is not well suited for analog binning. Analog binning is a method of averaging or summing the data from multiple pixels into a single output. There is a need in the art to address this issue.